amajid/debug_UART
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Majid_Abdelilah f151f6c5cb fixing the intiger output
2025-08-17 19:55:10 +01:00
src fixing the intiger output 2025-08-17 19:55:10 +01:00
.gitignore init 2025-07-30 17:44:00 +01:00
fpga_cpu.gprj adding io talking 2025-08-17 17:40:47 +01:00
fpga_cpu.gprj.user fixing the intiger output 2025-08-17 19:55:10 +01:00